1. Field of the Invention
The present invention relates to a semiconductor device in which a voltage is applied to the gate electrode through a gate pad.
2. Background Art
Japanese Laid-Open Patent Publication No. 2010-123774 discloses a semiconductor device in which a voltage is applied to the gate electrode through a gate pad. In this semiconductor device, the resistance between the gate pad and the gate electrode (which resistance may be hereinafter referred to as the gate resistance) is reduced, as compared to conventional semiconductor devices. Specifically, the wiring conductor connecting the gate pad with the gate electrode is for the most part made of Al (which has a low resistivity) to reduce the gate resistance. It should be noted that the switching speed of a semiconductor device can be increased by reducing the gate resistance.
It has been found, however, that a reduction in the gate resistance may result in the formation of a Hartley oscillator circuit in the semiconductor device, which circuit is formed by the gate-collector capacitance and the inductances of the bus bar and wires, etc. Such formation of a Hartley oscillator circuit in a semiconductor device may cause high frequency oscillation and electromagnetic wave radiation and thereby prevent the desired gate control.
It should be noted that the gate resistance may be increased to prevent “short-circuit oscillation,” which term refers to oscillation of a Hartley oscillator circuit. However, an increase in the gate resistance results in a decrease in the switching speed of the semiconductor device.